In order to meet the special requirements of the front-end readout system of cadmium zine telluride (CZT) detector for analog to digital converter (ADC), a foreground digital self-calibration successive approximation register (SAR) ADC with 12 bit 1. 6 MS / s is presented. The working mode of calibration followed by output is adopted to improve the real-time performance of data conversion. In the calibration mode, the core part of SAR-ADC injects low amplitude disturbance to the differential ramp input voltage, then uses the least mean square (LMS) adaptive algorithm to calibrate and fix the Sub-radix-2 capacitance weight in the digital domain. In the normal working mode, the digital code is output normally according to the calibrated weight value. A digital-analog hybrid simulation platform is built for simulation and verification. The results show that when the clock signal frequency is 20 MHz and the input signal frequency is 239. 1 kHz, the signal-to-noise and distortion ratio (SNDR) of SAR-ADC after calibration is increased from 45. 59 dB to 72. 35 dB, and the effective number of bit (ENOB) is increased from 7. 28 bit to 11. 73 bit. The performance of SAR-ADC is obviously improved, and the linearity δ between front-end readout circuit and SAR-ADC is-0. 29% ~ 0. 34%, which can meet the requirements of CZT detector front-end readout system.