Aiming at the problems in the current FPGA welding point failure assessment methods, such as the inability to provide accurate information, lack of sample data and low timeliness, combined with genetic algorithm (GA), an improved FPGA welding point failure assessment method based on the least square support vector machine (GA-LS-SVM) was proposed. Establish the SJ BIST test model, select the appropriate small external capacitor, simulate the welding spot resistance value by changing the variable resistor size at different operating frequencies, obtain the fault data based on the voltage change of small capacitor, and establish the three-dimensional data graph of the duration of capacitor low level, capacitor test working frequency and welding point resistance value; Finally using genetic algorithm to optimize the least squares support vector machine (SVM) to state evaluation of the obtained data, according to the three-dimensional data graph, there is a significant difference in the duration of low-level between healthy FPGA solder joints and broken FPGA solder joints. The simulation results show that the proposed GA-LA-SVM method has an overall accuracy rate of 97. 2%, which is 17. 9%, 13% and 7. 2% higher than BPNN, standard SVM and LS-SVM methods.