For the limitations of existing channel emulators on the channel numbers and scalability, a flexible emulator for multiple-input multiple-output (MIMO) channel is designed and implemented. By adopting an improved coordinate rotation digital computer (CORDIC) algorithm, the emulator can generate large number of accurate random channel fading in real-time, but consumes less hardware resources. On this basis, a flexible hardware framework based on the MIMO discrete channel model is also developed. With the advantages of field-programmable gate array ( FPGA) on parallel processing, the emulation framework is implemented on a FPGA platform. Hardware measurements are conducted with the parameters of extended vehicular A model (EVA) in 3GPP standard. The test results for both static and time-variant scenarios show that the output statistical properties of proposed emulator, i. e. , power delay profiles (PDP) and Doppler power spectrum densities (DPSD) are consistent well with the theoretical ones. Thus, it can be applied on the design verification, algorithm optimization, and performance evaluation of wireless communication devices.