低失调高摆率轨对轨运算放大器的设计
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合肥工业大学微电子设计研究所合肥230601

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TN98;TN929.52

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Design of low offset and high swing rate rail to rail operational amplifier
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Institute of VLSI Design, Hefei University of Technology, Hefei 230601, China

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    摘要:

    随着电子器件工艺的进步,芯片工作电压降低,对对轨运算放大器的性能要求越来越高,特别是在失调电压、摆率等关键参数方面。因此设计了一种低失调、高摆率轨对轨运算放大器,通过将一个高增益低带宽运算放大器和低增益高带宽结构进行级联,基于电流分配原理,实现输入级在轨对轨共模电压范围内的恒跨导;输出级采用前馈式AB类推挽放大器实现轨对轨输出,输出驱动能力强,同时设计了摆率增强电路来提升输入较大时输出摆率较低的不足,进一步提升了输出响应速度,增加了运放工作带宽;此外,为克服工艺偏差导致失调,在运算放大器输入级增加了数字熔丝对运放负载进行修调。最后,通过采用嵌套式密勒补偿实现运放工作稳定。后仿真结果表明,在2.2~5.5 V电源电压下,该运算放大器在1 kΩ和100 pF负载下具有10 MHz的增益带宽积,145 dB的开环电压增益62°相位裕度和11 V/μs的输出摆率以及最高70 μV的失调电压。相较于其他轨对轨运算放大器设计,该设计通过修调技术有效降低了失调电压,并通过摆率增强电路显著提高了输出摆率,使得该运算放大器在有限功耗下能够驱动大负载,同时具备较高精度和性能表现。

    Abstract:

    With the advancement of electronic device fabrication processes and the reduction of chip operating voltages, the performance requirements for rail to rail operational amplifiers have become increasingly stringent, particularly in critical parameters such as offset voltage and slew rate. This paper presents a low-offset, high slew rate rail to rail op-amp design. By cascading a high-gain low-bandwidth amplifier with a low-gain high-bandwidth architecture, constant transconductance is maintained across the rail to rail common-mode voltage range through current distribution principles. The output stage utilizes a feedforward Class AB push-pull amplifier to achieve rail to rail output with enhanced driving capability. A dedicated slew rate enhancement circuit is implemented to address the insufficient output slew rate under large input signals, thereby improving transient response and extending operational bandwidth. Additionally, to mitigate offset caused by process variations, a digital fuse trimming technique is incorporated at the input stage for load calibration. Operational stability is ensured through nested Miller compensation. Post-layout simulation results demonstrate that under a 2.2~5.5 V supply voltage with 1 kΩ and 100 pF load conditions, the op-amp achieves a gain-bandwidth product of 10 MHz, an open-loop gain of 145 dB, a phase margin of 62°, a slew rate of 11 V/μs, and a maximum offset voltage of 70 μV. Compared to conventional rail-to-rail op-amp designs, this architecture effectively reduces offset voltage through trimming technology and significantly enhances slew rate via dedicated enhancement circuitry, enabling the proposed design to drive heavy loads with high precision under constrained power consumption while maintaining superior performance metrics.

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陶金龙,沈睿婷,陈红梅.低失调高摆率轨对轨运算放大器的设计[J].电子测量与仪器学报,2025,39(6):264-273

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  • 在线发布日期: 2025-09-16
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