Low-dropout regulator (LDO) without external capacitors can provide low noise and low ripple power supply voltage for highly integrated on-chip system (SoC). To address slow transient response speed and poor stability of the capacitorfree LDO, active feedforward compensation technology was adopted to accelerate the charging and discharging rate of power transistors to promote the transient response speed of LDO; and introduce the left half-plane zeros to improve the stability of the system. Meanwhile, the feedforward compensation circuit can adaptively switch between the two-stage cascaded amplifier and the three-stage cascaded amplifier structures when the LDO changed between light and heavy loads, ensuring that the LDO remained stable throughout the full load range. The circuit was designed using the TSMC 0.18 μm CMOS technology. The simulation results show that when the on-chip load capacitance is 20 pF and the current load varies from 0 to 200 mA, the designed capacitor-free LDO can operate at an input power supply voltage of 1.7 to 2.8 V, stably output a power supply voltage of 1.5 V, and the system has a phase margin of more than 45° across the full load range. The overshoot and undershoot voltages are less than 100 mV when the load current jumps between 0 mA and 200 mA within 1 μs, and the recovery time is less than 0.6 μs. The designed LDO has achieved good performance in high stability, fast transient response, and wide load range.