Design of road marking detection system based on FPGA
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1.School of Mechanical Engineering, Changchun University of Science and Technology,Changchun 130022, China; 2.Changchun University of Science and Technology Chongqing Research Institute, Chongqing 401135, China

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TP391

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    Abstract:

    In order to meet the requirements of real-time detection of road signs, for the current mainstream target detection algorithms on the image processor there are a large number of model parameters, poor real-time performance, high power consumption and high cost, a real-time detection of road signs based on FPGA is proposed. In order to reduce the number of parameters and improve the detection speed, YOLOv3-tiny is used as the feature extraction network for the training and optimization of the weight parameters; the model floating-point parameters are quantized into 8-bit fixed-point numbers, and the quantized network model is used to complete the deployment experiments on the FPGA. The experimental results show that at the Yolov3-tiny network detection rate, the test frame rate of this system for the experimental dataset can reach 153 fps, the power consumption is 4.92 W, and the peak GOP/s is 115GOP/s. This system can satisfy the requirement of real-time target detection, and it can realize the deployment of the system under low power consumption.

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  • Received:
  • Revised:
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  • Online: May 15,2024
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