Two-dimensional discrete fast Fourier transformation is widely used in digital image processing, which is of great significance in engineering field. Usually, 2DFFT is computed using column decomposition, that is, a rowwise 1DFFT followed by another columnwise one. Due to the limitation of data transmission bandwidth of field programmable gate array and the physical structure characteristics of related storage hardware, this method cannot meet the requirement of realtime processing of highresolution images. The scheme of row FFTtransposedrow FFT can reduce the waiting time of direct memory access controller in the computation process and improve the computational efficiency of 2DFFT, but the existing implementation of matrix transposition has significant limitations. Traditional design uses load and store instructions to complete the transposition of a matrix. This paper proposes a 2DFFT scheme based on fast block transposition. By building a transposition module and a fourway parallel 1DFFT module, the FPGA onchip resources are fully utilized, thus the delay is reduced. The experiment is based on Xilinx Kintex UltraScale FPGA, and under the same clock frequency and parallel conditions, different 2DFFT calculation schemes are compared. Within the experimental error range, the solution proposed in this paper improves the computational efficiency by about 15 times.