Dual-cache based high speed spectral data acquisition and processing
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School of Instrument Science and Optoelectronic Engineering, Beijing Information Science and Technology University, Beijing 100192, China

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TN919.5

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    Abstract:

    In order to improve the measurement efficiency of digital spectrometer, an embedded high-speed data acquisition and processing technology based on FPGA+ARM architecture and two-level cache is investigated and implemented. The FPGA is used to provide a sampling clock for a high-speed A/D converter. The sampled data is then cached by a FIFO so as to realize cross clock domain data transmission. A DDR3 integrated with the ARM is used as a second cache to avoid data jam and loss phenomenon during the high speed transmission due to the relatively slow data processing by the ARM. Experimental tests show that the acquisition rate is up to 65 MHz, and the transmission rate is up to 25.6 Mbytes/s, and the normalized spectral intensity error is less than 0.5%. The achievements present herein can be generalized into such applications as precision instruments, equipment, digital devices and so on, wherein high speed and large throughput data acquisition and real-time data computation are usually indispensable.

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  • Online: April 11,2024
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