In order to solve the problem that the jitter value of the high-frequency digital signal inside the chip is difficult to measure accurately, this paper proposes an expander circuit structure that can reduce the frequency of the high-frequency digital square wave signal. The expander samples and outputs the edge of the high-frequency digital signal, and expands the input high-frequency digital signal into a low-frequency square wave signal with a preset period in real time while completely preserving the signal jitter. Transistor-level simulation experiments and MSI (Medium-Scale Integration, medium-scale integrated circuit) board-level verification show that this method can expand the time interval between adjacent edges of the signal, while preserving the jitter characteristics of the original signal, and can be used to measure frequencies up to several The jitter of high-frequency digital signals in gigahertz and the measurement accuracy is very high (error less than 0.7%). The expander has a simple structure and can be integrated inside the chip to quickly and accurately measure the jitter of the high-frequency digital signal on the chip.