Design and implementation of double FLASH data recorder based on FPGA
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National Key Laboratory for Electronic Measurement Technology, North University of China, Taiyuan 030051,China

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TN914.3

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    Abstract:

    In the research and development test process of missiles, rockets and other weapons and equipment, it is necessary to collect, store, and read back and analyze the data generated during the test. For traditional technology, it is impossible to simultaneously perform high-speed data from two data sources with large speed differences. For the problem of data storage, a dual FLASH data logger based on FPGA is designed. Two 8GB NAND FLASH parallel storage solutions are used to store 400Mbp Gigabit Ethernet data and 10Mbps PCM data at the same time. FLASH adopts the Multi-Plane method for data reading and writing. Due to the inherent characteristics of FLASH, the stored data will cause errors. Design Hamming code check code error correction scheme corrects the error code. Test and data analysis results show that the comprehensive data write data rate can reach 410Mbps, the readback data rate can reach 310Mbps, and the data logger's read and write test error rate is 0, which meets the data storage test requirements of weapons and equipment, and can be stored stably Data generated during the test of weapons and equipment in harsh environments such as high temperature and high impact.

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  • Received:
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  • Online: July 02,2024
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