CORDIC calculation algorithm and FPGA realization of robot reducer load
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School of Mechanical and Automotive Engineering, South China University of Technology, Guangzhou 510640, China

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TP391.4

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    Abstract:

    The reducer is one of the core components of the motion of industrial robots. There are a large number of trigonometric function calculations in its real-time load calculation, which requires a large amount of calculation, and the calculation using traditional methods is complex and has a high delay. This paper proposes a CORDIC calculation algorithm for robot reducer load, which can effectively reduce the load calculation delay. The focus is on the implementation of the algorithm in FPGA and structural improvements. Finally, a joint simulation is carried out in Quartus Ⅱ and ModelSim software. The results show: The absolute error of the load calculation of the robot reducer based on the CORDIC algorithm is less than , and the calculation delay is 15ns. Compared with the traditional load calculation method, it has the characteristics of high accuracy, good real-time performance, and less internal resources of the FPGA.

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  • Received:
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  • Online: August 22,2024
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