A design of data acquisition system for 100 MHz sampling rate ADC testing, and gives its hardware design principle and method, then briefly introduces the PC software working process. The system is adopted a form of FPGA+USB and mainly used for testing the dynamic parameters of 8 or 16 bit 100MHz sampling rate ADC. Among of them, FPGA is responsible for the collection of data caching and transmission, then through the USB to upload data to the host computer and use the control algorithm to calculate the ADC parameters and display them, thus obtains the result of the test ADC. The system has been used in routine testing, and has achieved good results.