In order to enrich the teaching content of digital logic design experiment and expand the function of digital circuit experiment testing equipment, an 8-channel digital signal timing analysis device is designed based on FPGA. The device has 8-channel Standard Test signal, and the 8-bit trigger word is set by two keys. When the 8-channel input signal meets the trigger condition, the on-chip RAM is enabled. The storage module realizes the storage of 8 digital signals; when the memory is full, the DA conversion is enabled; two analog signals are generated and sent to the X and Y channels of the digital oscilloscope; the display of 8 digital logic signals is realized by using the X-Y display mode of the oscilloscope; it has the function of manual cursor test and can display the corresponding 8 logos through the LED cursor. Edit the signal. The device solves the problem that the oscilloscope can not simultaneously observe the multi-channel logic signal in the process of digital circuit experiment. At the same time, it can be used as an engineering practice case to guide students to design the digital system based on FPGA.